Instruction sets
(most recent first)
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Instruction set#11(AMD64/EM64T) has been associated toChip family#220(Pentium D (Smithfield)) by Rigo -
Instruction set#17(SSE3) has been associated toChip family#220(Pentium D (Smithfield)) by Rigo -
Instruction set#20(NX Bit) has been associated toChip family#220(Pentium D (Smithfield)) by Rigo -
Instruction set#25(Extended MMX) has been associated toChip family#220(Pentium D (Smithfield)) by Rigo
Chip families
(most recent first)
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Chip family#220(Pentium D (Smithfield)) has been associated toInstruction set#25(Extended MMX) by Rigo -
Chip family#220(Pentium D (Smithfield)) has been associated toInstruction set#20(NX Bit) by Rigo -
Chip family#220(Pentium D (Smithfield)) has been associated toInstruction set#17(SSE3) by Rigo -
Chip family#220(Pentium D (Smithfield)) has been associated toInstruction set#11(AMD64/EM64T) by Rigo -
Chip family#220has been inserted by RigoAttribute Old value New value L1codeRationull 1 L1datanull 16KB L1dataRationull 1 descriptionnull 12'000 uops L1 trace cache No standard L1 Code cache as found... idnull 220 namenull Pentium D (Smithfield) processNodenull 90