Logs - TRW

Logs

6 operation(s)

Chip family#220 (Pentium D (Smithfield)) has been deleted by Rigo

Dec 17, 2023, 8:33:00 AM UTC

9c06d6e4d6e7772c45bf07da7b69fdaff1e7e0cf

Dec 17, 2023, 8:33:00 AM UTC
Chip family#220 (Pentium D (Smithfield)) has been associated to Instruction set#25 (Extended MMX) by Rigo

Dec 17, 2023, 8:22:46 AM UTC

7e2d8e6cc19061fa5a3b0a3ae5165faed32b8dfc

Dec 17, 2023, 8:22:46 AM UTC
Chip family#220 (Pentium D (Smithfield)) has been associated to Instruction set#20 (NX Bit) by Rigo

Dec 17, 2023, 8:22:46 AM UTC

7e2d8e6cc19061fa5a3b0a3ae5165faed32b8dfc

Dec 17, 2023, 8:22:46 AM UTC
Chip family#220 (Pentium D (Smithfield)) has been associated to Instruction set#17 (SSE3) by Rigo

Dec 17, 2023, 8:22:46 AM UTC

7e2d8e6cc19061fa5a3b0a3ae5165faed32b8dfc

Dec 17, 2023, 8:22:46 AM UTC
Chip family#220 (Pentium D (Smithfield)) has been associated to Instruction set#11 (AMD64/EM64T) by Rigo

Dec 17, 2023, 8:22:46 AM UTC

7e2d8e6cc19061fa5a3b0a3ae5165faed32b8dfc

Dec 17, 2023, 8:22:46 AM UTC

Chip family#220 has been inserted by Rigo

Dec 17, 2023, 8:22:46 AM UTC

Attribute	Old value	New value
`L1codeRatio`	null	1
`L1data`	null	16KB
`L1dataRatio`	null	1
`description`	null	12'000 uops L1 trace cache No standard L1 Code cache as found...
`id`	null	220
`name`	null	Pentium D (Smithfield)
`processNode`	null	90

7e2d8e6cc19061fa5a3b0a3ae5165faed32b8dfc

Dec 17, 2023, 8:22:46 AM UTC