Cyrix M2
Logs See all chips for this family
threadsMemory ctrl.
None
cpuFeatures
  • i686
  • MMX
Microarchitecture
CPUID
L1 cache 256B code, 64KB data
Process node
doc No documents available
notes Notes

CPU features

  • unified L1 data+code cache of 64KB
  • 256 bytes primary code cache

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