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Chip family#219has been updated by app:ppt-to-jsonAttribute Old value New value miscSpecsMicroarchitecture: CPUID: <br/>L1 cache: 256B code, 64KB data<br/>Process n... -
Chip family#219has been updated by RigoAttribute Old value New value L1code64KB 256B L1datanull 64KB -
Chip family#219(Cyrix M2) has been associated toInstruction set#7(MMX) by Rigo -
Chip family#219(Cyrix M2) has been associated toInstruction set#6(i686) by Rigo -
Chip family#219has been inserted by RigoAttribute Old value New value L1codenull 64KB L1codeRationull 1 L1dataRationull 1 descriptionnull CPU features - unified L1 data+code cache of 64KB - 256 bytes primary co... idnull 219 namenull Cyrix M2