Instruction sets
(most recent first)
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Instruction set#43(AVX) has been associated toChip family#157(Xeon E3-12xx v2) by Rigo -
Instruction set#11(AMD64/EM64T) has been associated toChip family#157(Xeon E3-12xx v2) by Rigo -
Instruction set#24(VT-x/AMD-V) has been associated toChip family#157(Xeon E3-12xx v2) by Rigo -
Instruction set#42(SSE4.2) has been associated toChip family#157(Xeon E3-12xx v2) by Rigo
Chip families
(most recent first)
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Chip family#157(Xeon E3-12xx v2) has been associated toInstruction set#42(SSE4.2) by Rigo -
Chip family#157(Xeon E3-12xx v2) has been associated toInstruction set#24(VT-x/AMD-V) by Rigo -
Chip family#157(Xeon E3-12xx v2) has been associated toInstruction set#11(AMD64/EM64T) by Rigo -
Chip family#157(Xeon E3-12xx v2) has been associated toInstruction set#43(AVX) by Rigo -
Chip family#157(Xeon E3-12xx v2) has been associated toRAM type#23(DDR3 UDIMM ECC) by Rigo -
Chip family#157(Xeon E3-12xx v2) has been associated toRAM type#13(DDR3 UDIMM) by Rigo