Instruction sets
(most recent first)
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Instruction set#129(IMCI) has been associated toChip family#702(Intel Knights Corner) by Rigo -
Instruction set#9(SSE) has been associated toChip family#702(Intel Knights Corner) by Rigo -
Instruction set#10(SSE2) has been associated toChip family#702(Intel Knights Corner) by Rigo -
Instruction set#17(SSE3) has been associated toChip family#702(Intel Knights Corner) by Rigo -
Instruction set#49(SSE4) has been associated toChip family#702(Intel Knights Corner) by Rigo -
Instruction set#19(SSE4.1) has been associated toChip family#702(Intel Knights Corner) by Rigo -
Instruction set#18(SSSE3) has been associated toChip family#702(Intel Knights Corner) by Rigo
Chip families
(most recent first)
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Chip family#702(Intel Knights Corner) has been associated toInstruction set#18(SSSE3) by Rigo -
Chip family#702(Intel Knights Corner) has been associated toInstruction set#19(SSE4.1) by Rigo -
Chip family#702(Intel Knights Corner) has been associated toInstruction set#49(SSE4) by Rigo -
Chip family#702(Intel Knights Corner) has been associated toInstruction set#17(SSE3) by Rigo -
Chip family#702(Intel Knights Corner) has been associated toInstruction set#10(SSE2) by Rigo -
Chip family#702(Intel Knights Corner) has been associated toInstruction set#9(SSE) by Rigo -
Chip family#702(Intel Knights Corner) has been associated toInstruction set#129(IMCI) by Rigo