Instruction sets
(most recent first)
-
Instruction set#11
(AMD64/EM64T) has been associated toChip family#72
(Phenom II) by Rigo -
Instruction set#24
(VT-x/AMD-V) has been associated toChip family#72
(Phenom II) by Rigo -
Instruction set#25
(Extended MMX) has been associated toChip family#72
(Phenom II) by Rigo -
Instruction set#22
(3DNow!+) has been associated toChip family#72
(Phenom II) by Rigo -
Instruction set#23
(SSE4A) has been associated toChip family#72
(Phenom II) by Rigo -
Instruction set#17
(SSE3) has been associated toChip family#72
(Phenom II) by Rigo
Chip families
(most recent first)
-
Chip family#72
(Phenom II) has been associated toInstruction set#17
(SSE3) by Rigo -
Chip family#72
(Phenom II) has been associated toInstruction set#23
(SSE4A) by Rigo -
Chip family#72
(Phenom II) has been associated toInstruction set#22
(3DNow!+) by Rigo -
Chip family#72
(Phenom II) has been associated toInstruction set#25
(Extended MMX) by Rigo -
Chip family#72
(Phenom II) has been associated toInstruction set#24
(VT-x/AMD-V) by Rigo -
Chip family#72
(Phenom II) has been associated toInstruction set#11
(AMD64/EM64T) by Rigo -
Chip family#72
(Phenom II) has been associated toRAM type#23
(DDR3 UDIMM ECC) by Rigo -
Chip family#72
(Phenom II) has been associated toRAM type#13
(DDR3 UDIMM) by Rigo -
Chip family#72
(Phenom II) has been associated toRAM type#19
(DDR2 UDIMM ECC) by Rigo -
Chip family#72
(Phenom II) has been associated toRAM type#9
(DDR2 UDIMM) by Rigo -
Chip family#72
has been updated by RigoAttribute Old value New value L1code
null 64KB L1data
null 64KB processNode
null 45