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Chip family#45has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID: 0: 660 (mA0)<br/>1: 665 (mB0)<br/><br/>L1 cache: ... Microarchitecture: CPUID: 660 (mA0),665 (mB0)<br/>L1 cache: 16KB code, 16KB... -
Chip family#45has been updated by app:ppt-to-jsonAttribute Old value New value miscSpecsMicroarchitecture: CPUID: 0: 660 (mA0)<br/>1: 665 (mB0)<br/><br/>L1 cache: ... -
Chip family#45(Celeron (Mendocino)) has been dissociated fromChip family#81(Pentium II (Deschutes)) by CarlosS.M. -
Chip family#45(Celeron (Mendocino)) has been associated toChip family#81(Pentium II (Deschutes)) by CarlosS.M. -
Chip family#45(Celeron (Mendocino)) has been associated toEntity documentation#47by Wolt1x -
Chip family#45(Celeron (Mendocino)) has been associated toInstruction set#7(MMX) by computerguy096 -
Chip family#45(Celeron (Mendocino)) has been associated toInstruction set#6(i686) by computerguy096 -
Chip family#45has been updated by computerguy096Attribute Old value New value L1codenull 16KB L1datanull 16KB nameCeleron (Mendocino) (PPGA) Celeron (Mendocino) processNodenull 250