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Chip family#33has been updated by CarlosS.M.Attribute Old value New value descriptionSSE2 supported in 90nm stepping E3 or newer models. AMD-V supported in A... SSE3 supported in 90nm models with stepping E3 or newer. AMD-V supported... -
Chip family#33(AMD K8 - Athlon 64) has been associated toRAM type#9(DDR2 UDIMM) by CarlosS.M. -
Chip family#33has been updated by CarlosS.M.Attribute Old value New value descriptionSSE2 supported in 90nm stepping E3 or newer. AMD-V supported in AM2 mode... SSE2 supported in 90nm stepping E3 or newer models. AMD-V supported in A... -
Chip family#33has been updated by CarlosS.M.Attribute Old value New value descriptionSSE2 supported in 90nm stepping E3 or newer. AMD-V supported in AM2 mode... -
Chip family#33(AMD K8 - Athlon 64) has been dissociated fromInstruction set#8(3DNow!) by CarlosS.M. -
Chip family#33(AMD K8 - Athlon 64) has been associated toInstruction set#24(VT-x/AMD-V) by CarlosS.M. -
Chip family#33(AMD K8 - Athlon 64) has been associated toInstruction set#20(NX Bit) by CarlosS.M. -
Chip family#33(AMD K8 - Athlon 64) has been associated toInstruction set#17(SSE3) by CarlosS.M. -
Chip family#33(AMD K8 - Athlon 64) has been associated toInstruction set#9(SSE) by CarlosS.M. -
Chip family#33(AMD K8 - Athlon 64) has been associated toInstruction set#7(MMX) by CarlosS.M. -
Chip family#33(AMD K8 - Athlon 64) has been associated toInstruction set#22(3DNow!+) by CarlosS.M. -
Chip family#33has been updated by CarlosS.M.Attribute Old value New value nameK8 - Athlon 64 AMD K8 - Athlon 64 -
Chip family#33(K8 - Athlon 64) has been associated toEntity documentation#360(Power and Thermal Data Sheet (30430, rev 3.51) []) by computerguy096 -
Chip family#33has been updated by computerguy096 -
Chip family#33has been updated by computerguy096 -
Chip family#33(K8 - Athlon 64) has been associated toChip family#351(K8 - Sempron) by Wolt1x -
Chip family#33has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID: <br/>L1 cache: 64KB code, 64KB data<br/>Process n... Microarchitecture: CPUID: <br/>L1 cache: 64KB code, 64KB data<br/>Process n... -
Chip family#33has been updated by app:ppt-to-jsonAttribute Old value New value miscSpecsMicroarchitecture: CPUID: <br/>L1 cache: 64KB code, 64KB data<br/>Process n... -
Chip family#33(K8 - Athlon 64) has been associated toInstruction set#11(AMD64/EM64T) by computerguy096 -
Chip family#33(K8 - Athlon 64) has been associated toInstruction set#8(3DNow!) by computerguy096 -
Chip family#33(K8 - Athlon 64) has been associated toInstruction set#10(SSE2) by computerguy096 -
Chip family#33(K8 - Athlon 64) has been associated toInstruction set#6(i686) by computerguy096 -
Chip family#33(K8 - Athlon 64) has been associated toRAM type#8(DDR UDIMM) by computerguy096 -
Chip family#33has been updated by computerguy096Attribute Old value New value L1codenull 64KB L1datanull 64KB processNodenull 130