Logs - TRW

Logs

4 operation(s)

Chip family#250 has been updated by app:ppt-to-json

Sep 11, 2024, 6:28:45 PM UTC

Attribute	Old value	New value
`miscSpecs`		Microarchitecture: CPUID: <br/>L1 cache: 8KB code, unknown data<br/>Process...

f8b047ff41dfc1654c6e46c95ec1a1210d3ca3ef

Sep 11, 2024, 6:28:45 PM UTC

Chip family#250 (STPC Elite) has been associated to Instruction set#4 (i486) by CarlosS.M.

May 23, 2024, 7:02:14 PM UTC

8f189746e5a3539d7ed557679a0ef2f73027ae7c

May 23, 2024, 7:02:14 PM UTC
Chip family#250 (STPC Elite) has been associated to RAM type#4 (SDR UDIMM) by CarlosS.M.

May 23, 2024, 7:02:14 PM UTC

8f189746e5a3539d7ed557679a0ef2f73027ae7c

May 23, 2024, 7:02:14 PM UTC

Chip family#250 has been inserted by CarlosS.M.

May 23, 2024, 7:02:14 PM UTC

Attribute	Old value	New value
`L1code`	null	8KB
`L1codeRatio`	null	1
`L1dataRatio`	null	1
`id`	null	250
`name`	null	STPC Elite

8f189746e5a3539d7ed557679a0ef2f73027ae7c

May 23, 2024, 7:02:14 PM UTC