Logs - TRW

Logs

8 operation(s)

Chip family#204 has been updated by app:ppt-to-json

Aug 30, 2024, 2:43:35 PM UTC

Attribute	Old value	New value
`miscSpecs`		Microarchitecture: CPUID: <br/> ...

7396561f4f3175dc37e376d61e0e0f5ebc2f67c5

Aug 30, 2024, 2:43:35 PM UTC

Chip family#204 (Celeron Dual-Core (Allendale)) has been associated to Chip family#102 (Pentium Dual-Core (Allendale)) by computerguy096

Nov 8, 2023, 11:55:29 PM UTC

eef1403758b7be2dcef4bec865346eec2dc28578

Nov 8, 2023, 11:55:29 PM UTC
Chip family#204 (Celeron Dual-Core (Allendale)) has been associated to Chip family#47 (Core 2 Duo (Conroe/Allendale)) by computerguy096

Nov 8, 2023, 11:23:12 PM UTC

f875036ac2f59aa2d3ff7b1383c676a5eae8d747

Nov 8, 2023, 11:23:12 PM UTC
Chip family#204 (Celeron Dual-Core (Allendale)) has been associated to Instruction set#11 (AMD64/EM64T) by computerguy096

Nov 8, 2023, 11:23:12 PM UTC

f875036ac2f59aa2d3ff7b1383c676a5eae8d747

Nov 8, 2023, 11:23:12 PM UTC
Chip family#204 (Celeron Dual-Core (Allendale)) has been associated to Instruction set#20 (NX Bit) by computerguy096

Nov 8, 2023, 11:23:12 PM UTC

f875036ac2f59aa2d3ff7b1383c676a5eae8d747

Nov 8, 2023, 11:23:12 PM UTC
Chip family#204 (Celeron Dual-Core (Allendale)) has been associated to Instruction set#18 (SSSE3) by computerguy096

Nov 8, 2023, 11:23:12 PM UTC

f875036ac2f59aa2d3ff7b1383c676a5eae8d747

Nov 8, 2023, 11:23:12 PM UTC
Chip family#204 (Celeron Dual-Core (Allendale)) has been associated to Instruction set#6 (i686) by computerguy096

Nov 8, 2023, 11:23:12 PM UTC

f875036ac2f59aa2d3ff7b1383c676a5eae8d747

Nov 8, 2023, 11:23:12 PM UTC

Chip family#204 has been inserted by computerguy096

Nov 8, 2023, 11:23:12 PM UTC

Attribute	Old value	New value
`L1code`	null	32KB
`L1codeRatio`	null	1
`L1data`	null	32KB
`L1dataRatio`	null	1
`id`	null	204
`name`	null	Celeron Dual-Core (Allendale)
`processNode`	null	65

f875036ac2f59aa2d3ff7b1383c676a5eae8d747

Nov 8, 2023, 11:23:12 PM UTC