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Chip family#196has been updated by app:ppt-to-jsonAttribute Old value New value miscSpecsMicroarchitecture: CPUID: <br/>L1 cache: 16KB code, 16KB data<br/>Process n... -
Chip family#196(Timna) has been dissociated fromRAM type#4(SDR UDIMM) by Rigo -
Chip family#196(Timna) has been dissociated fromChip family#25(Pentium III (Coppermine)) by Rigo -
Chip family#196(Timna) has been associated toChip family#25(Pentium III (Coppermine)) by CarlosS.M. -
Chip family#196(Timna) has been associated toInstruction set#9(SSE) by CarlosS.M. -
Chip family#196(Timna) has been associated toInstruction set#25(Intel Extended MMX) by CarlosS.M. -
Chip family#196(Timna) has been associated toInstruction set#7(MMX) by CarlosS.M. -
Chip family#196(Timna) has been associated toInstruction set#6(i686) by CarlosS.M. -
Chip family#196(Timna) has been associated toRAM type#4(SDR UDIMM) by CarlosS.M. -
Chip family#196(Timna) has been associated toRAM type#10(RDRAM) by CarlosS.M. -
Chip family#196has been inserted by CarlosS.M.Attribute Old value New value L1codenull 16KB L1codeRationull 1 L1datanull 16KB L1dataRationull 1 idnull 196 namenull Timna processNodenull 180