Transmeta Crusoe
Logs See all compatible boards See all chips for this family
threadsMemory ctrl.
DDR UDIMMSDR UDIMM144-pin SDR SO-DIMM200-pin DDR SO-DIMM
cpuFeatures
  • i686
  • MMX
Microarchitecture
CPUID
L1 cache 64KB code, 64KB data
Process node 130nm
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