Intel Knights Corner (x100)
GDDR5
- FMA3
- IMCI
- MMX
- SSE
- SSE2
- SSE3
- SSE4
- SSE4.1
- SSE4.2
- SSSE3
Release date
File
Logs
Intels First Offical Xeon phi architecture featuring the Initial Many Core Instructions (IMCI) on the K10M ISA, this forms the predecessor to AVX512
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