Intel 8042AH (Keyboard Controller)
dateType
Human Interface
No additional chip specs

Description:

Intel 8042AH Keyboard Controller:

mR_Slug notes:

This is the Intel UPI-42 (Universal Peripheral Interface 8042AH) programed as a keyboard controller and additional functions. It was released around '87. The 8042AH is a ROM mask (programmed at the factory). It is pin compatible with the 8042 and EPROM based 8742AH.

An 8042AH will NOT function as a keyboard controller UNLESS it is programed to do so. Programs can differ between 8042AH's. In this application, for FULL OPERATION in a motherboard the program MUST be correct. Typically, swapping an 8042AH from a PC to another, will often provide a functional keyboard, the additional functions may not work. It may be labeled as 'Keyboard BIOS'. Using an 8042AH programmed for some other (non-PC) application will NOT work.

Intel 8042AH Universal Peripheral Interface:

The Intel UPI-42 is a general-purpose Universal Peripheral Interfaces that allow the designer to develop customized solutions for peripheral device control.

They are essentially "slave" microcontrollers, or microcontrollers with a slave interface included on the chip. Interface registers are included to enable the UPI device to function as a slave peripheral controller in the MCS Modules and iAPX family, as well as other 8-, 16-bit systems.

To allow full user flexibility, the program memory is available in ROM, One-Time Programmable EPROM (OTP) and UV-erasable EPROM. All UPI-42 devices are fully pin compatible for easy transition from prototype to production level designs, These are the memory configurations available.

UPI Device ROM EPROM RAM Programming Voltage 8042AH 2K - 256 - 8742AH - 2K 256 12.5V

  • UPI-42: 12 MHz
  • Pin, Software and Architecturally Compatible with all UPI-41 and UPI-42 Products
  • 8-Bit CPU plus ROM/EPROM, RAM, I/O, Timer/Counter and Clock in a Single Package
  • 2048 x 8 ROM/EPROM, 256 x 8 RAM on UPI-42, 8-Bit Timer/Counter, 18 Programmable I/O Pins
  • One 8-Bit Status and Two Data Registers for Asynchronous Siave-to-Master Interface
  • DMA, Interrupt, or Polled Operation Supported
  • Fully Compatible with all Intel and Most Other Microprocessor Families
  • Interchangeable ROM and EPROM Versions
  • Expandable I/O
  • Sync Mode Available
  • Over 90 Instructions: 70% Single Byte
  • Available in EXPRESS
    • Standard Temperature Range
  • Intelligent Programming Algorithm
    • Fast EPROM Programming
  • Available in 40-Lead CERDIP, 40-Lead Plastic and 44-Lead Plastic Leaded Chip Carrier Packages
Last updated 2024-08-04T20:54:53Z
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