VLSI VL82C316 (SCAMP II System Controller)
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VL82C316 SCAMP II System Controller

The VL82C316 is a true single chip AT, high-performance controller for 386SX-based PC/AT systems. The VL82C316 is intended primarily for low-power applications requiring a high degree of integration (e.g. notebooks). However, the VL82C316 is also an excellent choice for high- integration, low-cost desktop systems running up to 33 MHZ.

The VL82C316 includes the dual 82C37 DMA controllers, dual 82C59A programmable interrupt controllers, 82C54 programmable interval timer, 82284 clock and ready generator, 82288 bus controller, 8042 keyboard controller, and 146818A-compatible real-time clock. Also included is the logic for SMM (system Management Mode) control, address/data bus control, memory control, shutdown, refresh generation and refresh/DMA arbitration.

The controller also includes the following:

  • AMD and Cyrix compatible SMM and I/O Break interface
  • Complete ISA bus interface logic
  • Integrated power management features
  • Supports slow and self-refresh DRAM
  • Memory/refresh controller
  • Port B and NMI logic
  • Bus steering logic
  • Turbo Mode control logic
  • Optional parity checking logic
  • Optional parity generation logic

The VL82C316 supports 387SX-compatible numeric coprocessors including versions that support slow and stop clock operation.

The memory controller logic is capable of accessing up to 16 MB. There can be up to four banks of 256K, 1M, or 4M attached in the system or eight banks of 512K x 8 DRAMS. The VL82C316 can drive the full compliment of DRAM banks without external buffering. It features Built-in Page Mode operation. This, along with two-way interleaving allow the PC designer to maximize system performance using low-cost DRAMs. Support is also included for zero, one, or two wait state operation of system DRAM.

Features:

  • Compatible with 386SX-based PC/AT compatible systems
  • Up to 33 MHz system clock
  • Replaces 11 peripheral devices on the motherboard:
    • Two 82C37A DMA controllers
    • 74LS612 memory mapper
    • Two 82C59A interrupt controllers
    • 82C54 timer
    • 82284 clock generator and ready interface
    • 82288 bus controller
    • Keyboard Controller
    • Real-time clock
  • Includes:
    • Memory/refresh controller
    • Port B and NMI logic
    • Bus steering logic
    • Parity generation checking logic
    • Turbo Mode control logic
    • Staggered refresh to minimize power supply load variations
    • Three-state control pin for board level testability
  • Supports:
    • Up to 16 MB system memory
    • PCMCIA 1.0 IC Memory Card mapping logic
    • VL82C325 (SX) Cache Controller compatible
    • Four 16- or 18-bit wide banks of 256K, 1M, or 4M DRAM or eight
    • 16-bit wide banks of 512K x 8 DRAM
    • Shadow RAM in 640K to 1M range
    • 387SX numeric coprocessors
    • 8- or 16-bit wide BIOS ROMs
    • Synchronous or asynchronous slot bus operation up to 16 MHz
    • Relocation of video and slot ROMs
  • Power saving features include:
    • Sleep and Suspend Modes
    • Slow DRAM refresh
    • CAS-before-RAS and Self-Refresh
    • Sleep Mode refresh switch to 32 kHz clock
    • Leakage Control in Stop Clock or Suspend Mode
    • CPU on or off option in Suspend Mode
    • Low-power page interleave memory mode
    • Fully static operation
    • DMA power management mode
    • Full SMM (system Management Mode) and I/O breal support
    • Supports standard Sleep Mode for interface to the VL82C323 Power Management Unit (PMU) or other third party PMUs
    • Programmable, extendable peripheral cycle
    • Disable software coprocessor reset option
    • Option for automatic bus speed-up on video or PCMCIA accesses
    • Full support for local bus peripherals
    • Separate power pins for ISA bus signals allows ISA to be powered down independently of other interfaces
  • Other advanced features:
    • Programmable I/O decode for 10 or 16-bit addresses
    • Hardware configurable setup to minimize custom BIOS requirements
    • Programmable drive current to reduce ringing on DRAM
  • 0.8-micron CMOS technology
  • 208-lead metric quad flat pack (MQFP)
Last updated 2019-04-30T00:00:00Z

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