Also known as:

• Samsung KS82C59A
• Mitsubishi M5L8259AP
• OKI M82C59A
• VLSI VL82C59A
• NEC uPD8259AC

Description:

Intel 8259A-2 Programmable Interrupt Controller

mR_Slug notes:

Briefly the differences between the variants:

• 8259A Data Valid From RD/INTA: Max 200ns c:79
• 8259A-2 Data Valid From RD/INTA: Max 120ns c:81 compatible with PC/XT/AT
• 8259A-8 Data Valid From RD/INTA: Max 300ns c:79

It's quickest to replace like with like. Note the non-A version has many more differences to the A versions. For a summary of differences see the following link, or consult the datasheets.

mR_Slug Intel Chip Specifications 1975 - 1989

Intel 8259A Programmable Interrupt Controller

The Intel 8259A Programmable Interrupt Controller handles up to eight vectored priority interrupts for the CPU. It is cascadable for up to 64 vectored priority interrupts without additional circuitry. It is packaged in a 28-pin DIP, uses NMOS technology and requires a single +5V supply. Circuitry is static, requiring no clock input.

The 8259A is designed to minimize the software and real time overhead in handling multi-level priority interrupts. It has several modes, permitting optimization for a variety of system requirements.

The 8259A is fully upward compatible with the Intel 8259. Software originally written for the 8259 will operate the 8259A in all 8259 equivalent modes (MCS-80/85, Non-Buffered, Edge Triggered).

• 8086, 8088 Compatible
• MCS-80, MCS-85 Compatible
• Eight-Level Priority Controller
• Expandable to 64 Levels
• Programmable Interrupt Modes
• Individual Request Mask Capability
• Single + 5V Supply (No Clocks)
• 28-Pin Dual-In-Line Package
• Available in EXPRESS
  • Standard Temperature Range
  • Extended Temperature Range